Quobly Demonstrates Single-Chip Readout and Gates on 300mm Industrial Silicon Process

Silicon spin-qubit hardware developer Quobly has achieved single-chip execution of qubit readout, single-qubit gates, and two-qubit gates on its proprietary QSOI® architecture. The quantum processing unit (QPU) was fabricated on an industrial 300-millimeter semiconductor production line using Fully Depleted Silicon-on-Insulator (FD-SOI) CMOS technology at STMicroelectronics’ manufacturing facility in Crolles (Grenoble, France).

The milestone validates Quobly’s technology transfer strategy, confirming that the three foundational quantum operations can be co-integrated alongside classical control circuitry on commercial 300mm FD-SOI silicon. Built using isotopically enriched silicon-28 (²⁸Si) wafer substrates, QSOI® leverages Very Large-Scale Integration (VLSI) principles to co-integrate quantum dot arrays with cryogenic control electronics on the same die. To support scaling toward million-qubit systems by 2032, the company has also established a proprietary cryogenic Process Design Kit (PDK) for multi-block circuit layouts.

The single-chip validation supports Quobly’s Alloy product roadmap. The company plans to make its initial system, Alloy Pioneer, available via cloud access by the end of 2026 for high-performance computing (HPC) and academic research partners. The announcement follows Quobly’s €115 million ($133.5M USD) Series A financing round and strategic material partnerships with Air Liquide, Soitec, and Orano to secure an industrial-grade ²⁸Si supply chain across Europe.

Review the official press release via Quobly Press Room here, and examine our prior coverage of Quobly’s €115 Million Series A Financing here, Quobly and Absolut System Cryogenic Roadmap Execution here, and Quobly’s Industrialization Agreements with TNO and OrangeQS here.

September 16, 2026