IBM, ORNL, and AMD Deploy Co-Located Quantum Error Correction Platform in Poughkeepsie

Hardware and supercomputing leaders IBM (NYSE: IBM), the Quantum Science Center (QSC) at Oak Ridge National Laboratory (ORNL), and AMD (NASDAQ: AMD) have launched a dedicated quantum error correction (QEC) co-design platform at IBM’s facility in Poughkeepsie, New York. Designed to eliminate network latency bottlenecks between heterogeneous compute tiers, the deployment co-locates IBM’s latest 120-qubit Quantum Nighthawk r2 processor with ORNL’s Umbra high-performance computing (HPC) system, powered by AMD Instinct MI355X accelerators and 5th Gen AMD EPYC CPUs.

Fault-tolerant quantum computing requires continuous syndrome-extraction cycles where classical decoding engines process error signals fast enough to prevent physical noise accumulation from overwhelming the logical register. In traditional cloud workflows, transferring syndrome telemetry across public networks introduces transmission delays that preclude real-time conditional branching. By physically placing the Umbra cluster adjacent to the dilution refrigerator infrastructure in Poughkeepsie, the consortium establishes a high-throughput, low-latency datapath, enabling GPU-accelerated decoders to execute in step with the QPU’s 100,000 circuits-per-second repetition rates.